New job ASIC/Layout Design Engr, Sr I in Uttar Pradesh
ASIC/Layout Design Engr, Sr I
Company : Synopsys India Private Limited
Salary : Details not provided
Location : Uttar Pradesh
- You will be part of a strong development team in the area of GPIOs , Speciality IOs and General Purpose Analog IPs
- You will develop layouts designs for Analog Full Custom IPs such as
–High performance LVDS
–On-Chip Thermal and Voltage Sensor , Adaptive Bias Generator , Process Monitoring Block, Voltage Regulators
- You will be working with experienced set of teams locally and in with people from various sites spread across globe.
- Technical Attributes
- 10+ years of industry experience in related field
- Good grip over CMOS circuit layout fundamentals, Technology effects, IO frame design methodology, Analog matching concepts
- Should have good understanding of layout and parasitic extraction.
- Should have good grip over automation /scripting languages
- Can provide technical guidance to juniors for good quality layout
- Personal Attributes
- Has a strong desire to learn and explore new technologies.
- Demonstrates good analysis and problem-solving skills.
- High energy individual with the ability to go an extra mile.
- A proactive team player with good written and verbal communication skills.
- Networks with senior internal and external personnel in own area of expertise.